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Texas Instruments /MSP432P401M /TIMER32 /T32CONTROL1

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Interpret as T32CONTROL1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ONESHOT_0)ONESHOT 0 (SIZE_0)SIZE 0 (PRESCALE_0)PRESCALE 0 (IE_0)IE 0 (MODE_0)MODE 0 (ENABLE_0)ENABLE

IE=IE_0, ONESHOT=ONESHOT_0, ENABLE=ENABLE_0, MODE=MODE_0, PRESCALE=PRESCALE_0, SIZE=SIZE_0

Description

Timer 1 Timer Control Register

Fields

ONESHOT

Selects one-shot or wrapping counter mode

0 (ONESHOT_0): wrapping mode

1 (ONESHOT_1): one-shot mode
SIZE

Selects 16 or 32 bit counter operation

0 (SIZE_0): 16-bit counter

1 (SIZE_1): 32-bit counter
PRESCALE

Prescale bits

0 (PRESCALE_0): 0 stages of prescale, clock is divided by 1

1 (PRESCALE_1): 4 stages of prescale, clock is divided by 16

2 (PRESCALE_2): 8 stages of prescale, clock is divided by 256
IE

Interrupt enable bit

0 (IE_0): Timer interrupt disabled

1 (IE_1): Timer interrupt enabled
MODE

Mode bit

0 (MODE_0): Timer is in free-running mode

1 (MODE_1): Timer is in periodic mode
ENABLE

Enable bit

0 (ENABLE_0): Timer disabled

1 (ENABLE_1): Timer enabled

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Register License

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data